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Feature Coverage
Longer-form reporting on plant operations, manufacturing technology, workforce strategy, and capital decisions.
Five months after tool move-in, industry sources say the Samsung Taylor fab is in partial 2nm production with utilization near 30%. Qualified Tesla AI5 volume is still set for 2H 2027, the same half TSMC Arizona Fab 2 targets for N3.
SK hynix broke ground in West Lafayette on a $4B+ HBM facility that fabricates nothing, ships its first part in Q3 2029, and — under current CBP precedent — likely still counts as Korean-origin. A look at what $1.2 billion in public money actually bought.
Global semiconductor sales hit $403.3 billion in Q2 2026, up 35.1% sequentially. Almost all of that increase is memory repricing, not a broad ASP shock — but the price wave is bleeding into analog, PMICs and discretes, lead times are extending, and the capital being deployed is going to AI logic and memory, not to the mature nodes industrial buyers actually depend on.
Intel proposed $15B on August 10, priced $20B the same day, and closed at roughly $23B gross once the greenshoe was taken in full — a raise that now exceeds its entire 2026 capex plan. It has one publicly named 14A customer, Tesla, whose anchor project is an unbuilt megafab, and no disclosed binding wafer commitment from any merchant buyer. This is capex-before-contract sequencing at High-NA EUV prices.
SK hynix's board approved 54.3 trillion won (~$38B) for two Korean fabs on Aug. 7 — the largest single capacity commitment of the memory supercycle, and none of it is wafer capacity in the U.S. incentive zone. Neither fab breaks ground before 2027 or runs a cleanroom before late 2028, which means the DRAM contract prices that rose 93–98% in Q1 have no supply-side answer this cycle. For industrial buyers without hyperscaler long-term agreements, the problem is allocation, not price.
On July 16, TSMC added $100B to its U.S. buildout, lifting the Arizona commitment to $265B and the plan to as many as 10 fabs. This round arrives with no new CHIPS grant and a record quarter behind it — reframing the story from subsidy to demand. The binding question for operators: whether Phoenix construction, tool installs, and a 2nm-capable workforce can absorb four more fabs on an undated timeline.
First concrete at Micron's Clay, New York campus landed more than a quarter early, six months after groundbreaking — as the company lifted its U.S. commitment to $250B through 2035. The real signal isn't the dollar figure; it's a CHIPS-era megaproject accelerating while the rest of the reshoring map slips.
Washington's reshoring story has been dominated by silicon logic and HBM memory. A $50M CHIPS letter of intent for Coherent's Sherman, Texas indium-phosphide fab points at a quieter chokepoint in the AI buildout: the photonics that move data between GPUs.
CHIPS Act dollars poured into wafer fabs, but the back end — assembly, test, and advanced packaging — stayed overseas. Asia-Pacific still holds roughly 74% of the OSAT market, so even Arizona-fabbed wafers fly to Taiwan to become finished chips. Amkor's $7B Peoria campus is the marquee fix, but it won't reach production until early 2028.
A richer 35% federal credit and a hard, unchanged construction deadline have turned year-end 2026 into a capex cliff for semiconductor fabs and their suppliers. The fight now is over what legally counts as breaking ground.
TI's second 300mm fab in Lehi, Utah starts production in 2026, onshoring the highest-volume, lowest-margin layer of the chip stack with a $1.6B CHIPS grant behind it. It arrives as China floods mature-node capacity — yet a 2026 cost-push cycle is pushing analog prices up, not down. The result is a genuine tension over whether subsidized domestic capacity rides a cost advantage through the cycle or masks a coming margin squeeze.
Samsung has quietly recast its end-2026 Taylor, Texas milestone from 'production start' to 'completing mass-production preparations,' pushing real volume 2nm output to early 2027. The reported cause isn't construction or yield — it's demand. With the building shell finished, Samsung held back installing costly wafer-fab tools until Tesla's AI5/AI6 commitment gave it an order book to fill.
Micron's January 16 groundbreaking in Clay launched a 20-year, ~$100B four-fab buildout that needs roughly 9,000 direct workers. Central New York's combined technician pipeline is currently producing graduates in dozens per cycle — and a 2025 CHIPS Act reallocation already shifted $1.2B from the New York site to Boise.
The only U.S. high-volume silicon carbide line is finally producing 200mm device wafers at scale — but a Chinese-led price collapse, slower EV adoption, and a fresh Chapter 11 emergence have handed power-module buyers leverage they did not have when the fab was greenlit.
Intel's New Albany campus was the CHIPS Act's signature image. A half-decade schedule slip and a $8.9 billion equity conversion turned it into a balance-sheet conversation — and a template for renegotiating the rest of the program.
Reports say TSMC will begin installing tools in its second Arizona fab in Q3 2026, targeting 3nm volume production in 2027 — roughly a year early. The acceleration sits inside a $165B, six-fab program and runs straight into Arizona's power and labor bottlenecks.
Micron's May 22 announcement that 1α DRAM is now running in Manassas — backed by $2.17 billion in expansion capital, a $275 million CHIPS award, and Virginia incentives — converts a long-time mature-node site into the most advanced memory fab on U.S. soil and the third leg of Micron's domestic DRAM footprint.
Micron's May 22 start of 1α DRAM production in Manassas turns Virginia into its second active U.S. fab geography, quadrupling DDR4 wafer supply for automotive and defense customers — and dropping a node-current fab into a region where Dominion is sitting on 50 GW of data-center interconnection requests and Manassas wastewater capacity is explicitly contingent on Micron's next move.
USTR Jamieson Greer's May 22 remarks at Micron's Manassas fab reframed semiconductor tariffs as sequenced, not paused. Memory and mature/legacy nodes — left out of January's narrow Section 232 round — are the two surfaces most exposed to a Phase 2.
A $100 million Citibank Korea and KEXIM facility for KoMiCo's U.S. expansion is a small headline that reveals a bigger pattern: Korean export-credit is now de-risking second-tier semiconductor suppliers into Arizona, Texas, and Oregon.
TSMC's board approved another $31.28B in capital appropriations on May 12 plus an up-to-$20B injection into its Arizona subsidiary. Read as a U.S.-vs-Asia split, the numbers are misleading — and the real ceiling on decoupling sits in advanced packaging, not wafer fabs.